RAM memory is 2000 of the key components of our computer, but it has evolved tediously in recent years since DDR memory was introduced in XNUMX. Since then, this memory has been the maximum XNUMX generation, and the XNUMX generation is a corner. But what will future RAM look like and what changes will it bring?
We are accustomed to a new generation of DDR, GDDR memory, or RAM memory that evolves in the form of memory types used at any given time every x years, but because it requires the use of certain technologies. , This is subject to change. It keeps evolving.
How has RAM been expanded during this time?
RAM, a semiconductor, evolves as follows: Moore’s Law At the same time, Dennard’s law means that on the one hand, the density of transistors increases, which in turn increases memory storage capacity, and on the other hand, communication speed increases. To do. This is called bandwidth.
The idea is very simple. For each new manufacturing node, the voltage required to achieve a particular clock speed is reduced, allowing you to create faster RAM at the same speed or significantly less consumed RAM at the same speed. I will.
However, the problem is with increasing speed. The bandwidth of the system’s RAM depends on the amount of bandwidth per new node, as it depends on the energy consumption of the communication between the memory and the processor to which it is allocated. Is limited and is happening in that jumps from one type of DDR memory to another are getting smaller and smaller.
What if in the future the system RAM cannot be expanded further?
You can see that the clock speed jump is getting smaller and smaller for each new manufacturing node used to create both memory and processor. This only affects the processor for now, but it doesn’t take long for memory to affect the processor, with fewer jumps between generations than expected, to near zero.
The solution to this is to use technologies such as: Although used in future iterations of the PAM-4 GDDR6X and PCI Express standards, from a particular point of view, PAM-4 is still a type of data compression. In addition, futures DDR6 memory is said to have the potential to use PAM-4 communication.
And when it comes to data compression, it has RAM memory with internal logic, accelerators designed to make data retrieval more efficient and faster, and the possibility of compressing and decompressing data on transmitted flights. there is. The reason for doing this is very simple. Sending x bytes of compressed data consumes the same energy as sending the same number of bytes of uncompressed data.
Are you going to see 3D DRAM memory as future RAM?
3D DRAM consists of stacking multiple memory chips and communicating with a memory controller using a route through silicon.
For DDR memory, there is a 64DS-DDR standard that stacks up to 4 DDR chips (nth generation DDR) connected to a 3-bit controller. Therefore, this technology can be used to reduce the total 8-chip DIMMs to XNUMX chips only. However, although there is no advantage in consumption and speed, the memory is so expensive that it is not standardized for use and uses conventional memory DIMMs.
3D DRAM only makes sense if it has an interface with many pins that can send many bits per cycle, and lower clock speeds and therefore lower voltages can be used, but these solutions Require a complex interposer. Significantly limits RAM extensions.
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